计算机术语总结之CPU类
3dnow!(3d no waiting)
/ B! C' H. t+ B3 @- P! falu(arithmetic logic unit,算术逻辑单元)
6 z, ^# a. \. o9 Uagu(address generation units,地址产成单元)
8 B5 S! K# a8 G! lbga(ball grid array,球状矩阵排列)
5 h& T' _: S$ e2 @$ P( g# g3 [bht(branch prediction table,分支预测表)/ V- ^- x8 V* z
bpu(branch processing unit,分支处理单元)% S4 q8 Y' O& o
brach pediction(分支预测)
/ B, b4 C( U" Ncmos: complementary metal oxide semiconductor,互补金属氧化物半导体
% J% |" s; m% S: }. Mcisc(complex instruction set computing,复杂指令集计算机)
3 {* a8 z! z/ Z* x; w- Nclk(clock cycle,时钟周期)1 w0 g/ r& p2 L# R8 ~
cob(cache on board,板上集成缓存)
c4 z5 Y( o! L. L, r8 Scod(cache on die,芯片内集成缓存)
* i6 E5 P: b# J9 K, Ccpga(ceramic pin grid array,陶瓷针型栅格阵列)
6 F( R9 A+ U+ ycpu(center processing unit,中央处理器)7 v) r' P7 |% N8 ?3 b/ U9 P
data forwarding(数据前送); o. q! h) i; S: p' i( P! m. u
decode(指令解码)3 p7 t7 F) |, v( O5 S
dib(dual independent bus,双独立总线)
5 ?3 R, ^4 B- sec(embedded controller,嵌入式控制器)
0 M# n) a. S: Vembedded chips(嵌入式)
! V- v4 D8 d) A* Xepic(explicitly parallel instruction code,并行指令代码)
# T1 e, g: g4 G' V$ j+ Ofadd(floationg point addition,浮点加)
6 w; B0 u0 U+ Y. v% A& x ^, Dfcpga(flip chip pin grid array,反转芯片针脚栅格阵列)
! Q3 ? {* v8 c$ Z# {. h7 pfdiv(floationg point divide,浮点除)0 L9 c' ~! A6 i4 r4 u
femms:fast entry/exit multimedia state,快速进入/退出多媒体状态
& L, d p/ s0 b& I) a& sfft(fast fourier transform,快速热欧姆转换)% O/ S4 U; o, j* d5 p( T8 a' p
fid(fid:frequency identify,频率鉴别号码)
# [5 F: f: _$ t8 J% F' _. p5 Nfifo(first input first output,先入先出队列)3 d: ~- D. E$ ^( Y D
flip-chip(芯片反转)( i2 h$ R o5 b% A0 ?! n5 y: a
flop(floating point operations per second,浮点*作/秒)
' E) D! E" \3 V+ Q# [fmul(floationg point multiplication,浮点乘), j+ t8 Q+ j! v, Z3 `! j
fpu(float point unit,浮点运算单元)
( J* ?: K6 O, c! n: c( k1 C. [4 Sfsub(floationg point subtraction,浮点减)0 }2 |: z' E& ~; a2 p* s
gvpp(generic visual perception processor,常规视觉处理器)
- B" I) d: ^; _* ehl-pbga: 表面黏著,高耐热、轻薄型塑胶球状矩阵封装
7 W6 k! i) d* ? Eia(intel architecture,英特尔架构)& E8 v" t! A i. ?) X" A! b( I0 F
icu(instruction control unit,指令控制单元)
% }4 X2 p: H1 W1 Did:identify,鉴别号码
6 \5 H0 ]( g& h [7 kidf(intel developer forum,英特尔开发者论坛)
9 s% p% F* n3 q7 C& ]% B7 U& u: }ieu(integer execution units,整数执行单元)3 B# F0 @( a5 L& X/ Z8 S" w& A
imm: intel mobile module, 英特尔移动模块
E( p* B/ L: Y: f; |instructions cache,指令缓存
- l! n6 l8 x$ P% H5 d* Xinstruction coloring(指令分类)
; q* k6 F; `( d+ Z- W0 Uipc(instructions per clock cycle,指令/时钟周期)" v1 M3 p6 w9 `4 s {
isa(instruction set architecture,指令集架构)
& q" p) m+ O; M g9 ckni(katmai new instructions,katmai新指令集,即sse); Z* j. }) ~6 g$ H+ |; Z' M ` k! g, b
latency(潜伏期)
# z8 L+ f2 _- ]ldt(lightning data transport,闪电数据传输总线)3 U/ E/ m5 d6 u6 t+ N
local interconnect(局域互连) 5 O, O/ N- z) P! D
mesi(modified, exclusive, shared, invalid:修改、排除、共享、废弃)2 G# O! x2 g' t9 \6 p/ h* t1 j9 a
mmx(multimedia extensions,多媒体扩展指令集)2 H5 R* H8 G) O: A3 z
mmu(multimedia unit,多媒体单元)6 D3 A( c# R# R1 _/ V
mflops(million floationg point/second,每秒百万个浮点*作)
( y' |5 H1 l3 @9 n P6 `) P5 M2 Jmhz(million hertz,兆赫兹)
9 k! o+ O- c. P$ l5 l! ^5 D( Amp(multi-processing,多重处理器架构)! l8 m1 W% j8 N7 l& A0 f
mps(multiprocessor specification,多重处理器规范). x2 |5 D( w0 D
msrs(model-specific registers,特别模块寄存器)
" t4 E9 |# H4 \1 O( L9 ?3 r. ^0 xnaoc(no-account overclock,无效超频)- S, ^& v' F4 {, `1 U) y4 c& J
ni:non-intel,非英特尔
% Q) O/ q+ S C, oolga(organic land grid array,基板栅格阵列)
- a) o. x# }) u( Y9 iooo(out of order,乱序执行)
9 a) e5 q4 l% V/ h! ?pga: pin-grid array(引脚网格阵列),耗电大
4 w- o! s! g" X; s7 s- Epost-risc8 p4 i8 b6 _6 `" F
pr(performance rate,性能比率)
& t& ]5 U5 p Z9 q% X4 O/ Kpsn(processor serial numbers,处理器序列号)
1 h! }3 P, z2 Ipib(processor in a box,盒装处理器)
% b3 R |! E. Wppga(plastic pin grid array,塑胶针状矩阵封装)
; V: ~. L! g8 O( s6 `' n: wpqfp(plastic quad flat package,塑料方块平面封装)
. R% e6 H' b: [4 ^' Draw(read after write,写后读)
# n3 A. `# I* Pregister contention(抢占寄存器)
, V" \; t; T- ?3 U7 \) E, x" K& jregister pressure(寄存器不足)
% |; @: R7 h3 H. Nregister renaming(寄存器重命名)8 |& R: p! H2 S; [- h% ^; x
remark(芯片频率重标识)6 y- H, z1 `) f( x0 r( b' O/ \
resource contention(资源冲突)
/ w: d/ i }3 Z7 G5 ]retirement(指令引退); l) a; s- u" |: ~
risc(reduced instruction set computing,精简指令集计算机)& F% I; _9 |6 a- u! {
sec: single edge connector,单边连接器
; O6 A1 |2 t5 v* P$ Ushallow-trench isolation(浅槽隔离)
& J* H9 N7 Y6 d5 r4 x1 |simd(single instruction multiple data,单指令多数据流)
8 U4 h& Y! n* Lsio2f(fluorided silicon oxide,二氧氟化硅)1 i4 t* g: N0 N" x/ E4 X5 h0 r
smi(system management interrupt,系统管理中断)
. R9 r- |% k, K- ^smm(system management mode,系统管理模式)
, Y% [9 \" d1 F! g( nsmp(symmetric multi-processing,对称式多重处理架构)2 _; y7 [: @' _& I; \$ w+ ?% t/ V
soi: silicon-on-insulator,绝缘体硅片% j. m! }% p! p# k8 E% R
sonc(system on a chip,系统集成芯片)
+ o9 ?2 l- t; r; `* aspec(system performance evaluation corporation,系统性能评估测试)
2 _7 B+ `! k( @& y# r/ Q4 Z/ Dsqrt(square root calculations,平方根计算)/ E- h# s4 t8 k" p0 I+ z
sse(streaming simd extensions,单一指令多数据流扩展)
+ M) X8 R& L+ v2 _% o3 Isuperscalar(超标量体系结构)* O3 Z* R) C2 M) c
tcp: tape carrier package(薄膜封装),发热小
4 M0 ~) @& M+ p: {throughput(吞吐量)
. _( k" I9 z0 k4 Rtlb(translate look side buffers,翻译旁视缓冲器)
. h& e0 j. g) T# R& `: I% Muswc(uncacheabled speculative write combination,无缓冲随机联合写*作)
$ y- W" u0 p# @* _valu(vector arithmetic logic unit,向量算术逻辑单元)
3 ]$ O. i( V/ v0 gvliw(very long instruction word,超长指令字)7 a2 W5 R! f" s7 f- c5 F r
vpu(vector permutate unit,向量排列单元)2 s1 z8 ?( [) [/ ~
vpu(vector processing units,向量处理单元,即处理mmx、sse等simd指令的地方)